CSCI150 Assignment 4 Welcome to your CSCI150 Assignment 4. You will need to write down your name and student ID as they appear in your college profile. You have until the end of Week 11 to complete this assignment. You may retake this assignment as many time as you want. Submission on this webpage will give you instant feedback, use it wisely. Name Student ID Q1 Which of the following is an asynchronous sequential circuit? A circuit with two Clock units running both at 1GHz A circuit with a Binary switch providing Clock signal. A circuit without storage device. None of above. None Q2 What happens if you replace D Flip-Flops with D Latch in a synchronous sequential circuit? Nothing, it would still work exactly the same. Instead of a pulse, as soon as the CLK becomes positive, state transition is done. Instead of a pulse, as soon as the CLK becomes negative, state transition is done. The circuit may never stabilise, and will likely produce error. None Q3 Which of the following regarding state assignment is correct? One-Hot Assignments of the same circuit are always equivalent. Sequential Assignments of the same circuit are always equivalent. There are only two assignment methods: one-hot and sequential. All of above None Q4 Consider reimplementing a D Flip-Flop with D latches as both the Master and Slave latch. This is a good idea since it will reduce propagation delay. This is a good idea since it uses less components. This is a good idea, since SR latches might produce undefined output. This is a bad idea, D latches are more complex than SR latches. None Q5 To ensure the circuit is actually synchronous, which of the following must be ensured in sequential circuit? Use only one type of Flip Flop. Clock pulses must be generated at constant frequency. There must not be additional components between the CLK and C pins of all flip-flops. All of above. Q6 A sequential circuit has reached step 3 of its 8 step designing procedure. It it know that it will have 6 states, 2 bits of input, 4 bits of output, assuming no restriction on Input, and you want to use sequential assignment, at most how many don't care conditions can you have in optimisation? Q7 A sequential circuit has reached step 3 of its 8 step designing procedure. It it know that it will have 6 states, 2 bits of input, 4 bits of output, assuming no restriction on Input, and you want to use OneHot assignment, at most how many don't care conditions can you have in optimisation? Q8 In a von Neumann architecture, where might we find information storage units? (components that can retain information, be it permanent or temporary) CPU I/O Device Memory All of above None Q9 In sequential circuit design, compare the state table against a truth table, which of the following is true? D Flip-Flop's input D ports are treated similarly to additional outputs in truth table D Flip-Flop's output Q ports are treated similarly to additional inputs in truth table Both of above None of above None Q10 Assuming a D flip-flop has the same propagation delay as JK flip-flop. To implement a T flip-flop, which component should be used? D flip-flop. JK flip-flop Either one of them, it is the same Cannot be done None 1 out of 2 By checking this box, I acknowledge I finished this assignment on my own WITHOUT cheating. 2 out of 2 Time's up
