[CSCI150] Lecture 5: Sequential Circuits Design

In Lecture 4, we will start with sequential circuit designs which includes storage units.

LS26 Part 1 (Lecture + Tutorial): von Neumann Review, What is a Register, Register Design, Register with EN

Highlight:

• von Neumann CPU
  • Control Unit: Interprets instructions, coordinate between Datapath, Memory, and IO
  • Datapath: contains registers, the storage component within a CPU for temporary info storage. Usually less than 30 registers, each a binary number (say for 64bit CPUs, each a 64bit number).
  • Calculation require operands to be loaded into then register from memory before taking place in the datapath using arithmetic functional blocks.
• Simple Registers
  • Designed using Flip Flops. A 4bit Register will require 4 D Flip Flops.
  • Loading: register function that loads the register with a new value from D ports
  • Clearing: register function used to reset a register’s value to all zeroes
  • EN: multiple registers often share a single input channel, the additional EN port on register allow one to specify which register should take in new values and which ones should retain their current values.
    • Require D Flip-Flop with EN and Reset. You can use the one provided in the system library or implement your own.

LS26 Part 2 (Lecture): X86 CPU Example, Datapath Architecture overview

Highlights

• x86 CPU Example
  • Datapath receives commanding signals from Control Unit, stores data inside the register array, and perform calculation, and store the results back into the register array
• Simple Datapath Architecture
  • A register array with multiple registers, sharing CLK and sometimes Reset (for simplicity let’s say it is shared)
  • A functional block array
  • Multiplexers to select input to the functional blocks
  • A feedback bus leading back to the register array, so that new values can be stored within

LS26 Part 3 (Lecture): Register Microoperations

Highlights:

• Microoperations
  • Single Register Microoperations: Single (or No) Register as Input, Single Register as Output
    • Assignment, Reg. Transfer, Shifting, Bitwise NOT, Vector, etc.
  • Multiple Register Microoperations: Multiple Registers provide input
    • Addition, Subtraction. Bitwise AND/OR/XOR, Concatenate, etc.
  • VHDL syntax for microoperations

LS27 (Lecture + Tutorial): Datapath Implementation

Highlights:

• Datapath Implementation Tutorial
  • Selecting register to provide input to all functional blocks: using multiplexer
  • Selecting functional block to perform calculation: using multiplexer
  • Selecting register to receive calculation results: using Decoder and enabling ports on Registers